1#![doc = "Peripheral access API for SAMPLE_MCU microcontrollers (generated using svd2rust v0.37.1 ( ))\n\nYou can find an overview of the generated API [here].\n\nAPI features to be included in the [next] svd2rust release can be generated by cloning the svd2rust [repository], checking out the above commit, and running `cargo doc --open`.\n\n[here]: https://docs.rs/svd2rust/0.37.1/svd2rust/#peripheral-api\n[next]: https://github.com/rust-embedded/svd2rust/blob/master/CHANGELOG.md#unreleased\n[repository]: https://github.com/rust-embedded/svd2rust"]
2#![allow(non_camel_case_types)]
3#![allow(non_snake_case)]
4#![no_std]
5#![cfg_attr(docsrs, feature(doc_cfg))]
6#[doc = r"Number available in the NVIC for configuring priority"]
7pub const NVIC_PRIO_BITS: u8 = 3;
8#[allow(unused_imports)]
9use generic::*;
10#[doc = r"Common register and bit access and modify traits"]
11pub mod generic {
12 use core::marker;
13 #[doc = " Generic peripheral accessor"]
14 pub struct Periph<RB, const A: usize> {
15 _marker: marker::PhantomData<RB>,
16 }
17 unsafe impl<RB, const A: usize> Send for Periph<RB, A> {}
18 impl<RB, const A: usize> Periph<RB, A> {
19 #[doc = "Pointer to the register block"]
20 pub const PTR: *const RB = A as *const _;
21 #[doc = "Return the pointer to the register block"]
22 #[inline(always)]
23 pub const fn ptr() -> *const RB {
24 Self::PTR
25 }
26 #[doc = " Steal an instance of this peripheral"]
27 #[doc = ""]
28 #[doc = " # Safety"]
29 #[doc = ""]
30 #[doc = " Ensure that the new instance of the peripheral cannot be used in a way"]
31 #[doc = " that may race with any existing instances, for example by only"]
32 #[doc = " accessing read-only or write-only registers, or by consuming the"]
33 #[doc = " original peripheral and using critical sections to coordinate"]
34 #[doc = " access between multiple new instances."]
35 #[doc = ""]
36 #[doc = " Additionally, other software such as HALs may rely on only one"]
37 #[doc = " peripheral instance existing to ensure memory safety; ensure"]
38 #[doc = " no stolen instances are passed to such software."]
39 pub unsafe fn steal() -> Self {
40 Self {
41 _marker: marker::PhantomData,
42 }
43 }
44 }
45 impl<RB, const A: usize> core::ops::Deref for Periph<RB, A> {
46 type Target = RB;
47 #[inline(always)]
48 fn deref(&self) -> &Self::Target {
49 unsafe { &*Self::PTR }
50 }
51 }
52 #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)"]
53 pub trait RawReg:
54 Copy
55 + From<bool>
56 + core::ops::BitOr<Output = Self>
57 + core::ops::BitAnd<Output = Self>
58 + core::ops::BitOrAssign
59 + core::ops::BitAndAssign
60 + core::ops::Not<Output = Self>
61 + core::ops::Shl<u8, Output = Self>
62 {
63 #[doc = " Mask for bits of width `WI`"]
64 fn mask<const WI: u8>() -> Self;
65 #[doc = " `0`"]
66 const ZERO: Self;
67 #[doc = " `1`"]
68 const ONE: Self;
69 }
70 macro_rules! raw_reg {
71 ($ U : ty , $ size : literal , $ mask : ident) => {
72 impl RawReg for $U {
73 #[inline(always)]
74 fn mask<const WI: u8>() -> Self {
75 $mask::<WI>()
76 }
77 const ZERO: Self = 0;
78 const ONE: Self = 1;
79 }
80 const fn $mask<const WI: u8>() -> $U {
81 <$U>::MAX >> ($size - WI)
82 }
83 impl FieldSpec for $U {
84 type Ux = $U;
85 }
86 };
87 }
88 raw_reg!(u8, 8, mask_u8);
89 raw_reg!(u16, 16, mask_u16);
90 raw_reg!(u32, 32, mask_u32);
91 raw_reg!(u64, 64, mask_u64);
92 #[doc = " Raw register type"]
93 pub trait RegisterSpec {
94 #[doc = " Raw register type (`u8`, `u16`, `u32`, ...)."]
95 type Ux: RawReg;
96 }
97 #[doc = " Raw field type"]
98 pub trait FieldSpec: Sized {
99 #[doc = " Raw field type (`u8`, `u16`, `u32`, ...)."]
100 type Ux: Copy + core::fmt::Debug + PartialEq + From<Self>;
101 }
102 #[doc = " Marker for fields with fixed values"]
103 pub trait IsEnum: FieldSpec {}
104 #[doc = " Trait implemented by readable registers to enable the `read` method."]
105 #[doc = ""]
106 #[doc = " Registers marked with `Writable` can be also be `modify`'ed."]
107 pub trait Readable: RegisterSpec {}
108 #[doc = " Trait implemented by writeable registers."]
109 #[doc = ""]
110 #[doc = " This enables the `write`, `write_with_zero` and `reset` methods."]
111 #[doc = ""]
112 #[doc = " Registers marked with `Readable` can be also be `modify`'ed."]
113 pub trait Writable: RegisterSpec {
114 #[doc = " Is it safe to write any bits to register"]
115 type Safety;
116 #[doc = " Specifies the register bits that are not changed if you pass `1` and are changed if you pass `0`"]
117 const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
118 #[doc = " Specifies the register bits that are not changed if you pass `0` and are changed if you pass `1`"]
119 const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = Self::Ux::ZERO;
120 }
121 #[doc = " Reset value of the register."]
122 #[doc = ""]
123 #[doc = " This value is the initial value for the `write` method. It can also be directly written to the"]
124 #[doc = " register by using the `reset` method."]
125 pub trait Resettable: RegisterSpec {
126 #[doc = " Reset value of the register."]
127 const RESET_VALUE: Self::Ux = Self::Ux::ZERO;
128 #[doc = " Reset value of the register."]
129 #[inline(always)]
130 fn reset_value() -> Self::Ux {
131 Self::RESET_VALUE
132 }
133 }
134 #[doc(hidden)]
135 pub mod raw {
136 use super::{marker, BitM, FieldSpec, RegisterSpec, Unsafe, Writable};
137 pub struct R<REG: RegisterSpec> {
138 pub(crate) bits: REG::Ux,
139 pub(super) _reg: marker::PhantomData<REG>,
140 }
141 pub struct W<REG: RegisterSpec> {
142 #[doc = "Writable bits"]
143 pub(crate) bits: REG::Ux,
144 pub(super) _reg: marker::PhantomData<REG>,
145 }
146 pub struct FieldReader<FI = u8>
147 where
148 FI: FieldSpec,
149 {
150 pub(crate) bits: FI::Ux,
151 _reg: marker::PhantomData<FI>,
152 }
153 impl<FI: FieldSpec> FieldReader<FI> {
154 #[doc = " Creates a new instance of the reader."]
155 #[allow(unused)]
156 #[inline(always)]
157 pub(crate) const fn new(bits: FI::Ux) -> Self {
158 Self {
159 bits,
160 _reg: marker::PhantomData,
161 }
162 }
163 }
164 pub struct BitReader<FI = bool> {
165 pub(crate) bits: bool,
166 _reg: marker::PhantomData<FI>,
167 }
168 impl<FI> BitReader<FI> {
169 #[doc = " Creates a new instance of the reader."]
170 #[allow(unused)]
171 #[inline(always)]
172 pub(crate) const fn new(bits: bool) -> Self {
173 Self {
174 bits,
175 _reg: marker::PhantomData,
176 }
177 }
178 }
179 #[must_use = "after creating `FieldWriter` you need to call field value setting method"]
180 pub struct FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe>
181 where
182 REG: Writable + RegisterSpec,
183 FI: FieldSpec,
184 {
185 pub(crate) w: &'a mut W<REG>,
186 pub(crate) o: u8,
187 _field: marker::PhantomData<(FI, Safety)>,
188 }
189 impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety>
190 where
191 REG: Writable + RegisterSpec,
192 FI: FieldSpec,
193 {
194 #[doc = " Creates a new instance of the writer"]
195 #[allow(unused)]
196 #[inline(always)]
197 pub(crate) fn new(w: &'a mut W<REG>, o: u8) -> Self {
198 Self {
199 w,
200 o,
201 _field: marker::PhantomData,
202 }
203 }
204 }
205 #[must_use = "after creating `BitWriter` you need to call bit setting method"]
206 pub struct BitWriter<'a, REG, FI = bool, M = BitM>
207 where
208 REG: Writable + RegisterSpec,
209 bool: From<FI>,
210 {
211 pub(crate) w: &'a mut W<REG>,
212 pub(crate) o: u8,
213 _field: marker::PhantomData<(FI, M)>,
214 }
215 impl<'a, REG, FI, M> BitWriter<'a, REG, FI, M>
216 where
217 REG: Writable + RegisterSpec,
218 bool: From<FI>,
219 {
220 #[doc = " Creates a new instance of the writer"]
221 #[allow(unused)]
222 #[inline(always)]
223 pub(crate) fn new(w: &'a mut W<REG>, o: u8) -> Self {
224 Self {
225 w,
226 o,
227 _field: marker::PhantomData,
228 }
229 }
230 }
231 }
232 #[doc = " Register reader."]
233 #[doc = ""]
234 #[doc = " Result of the `read` methods of registers. Also used as a closure argument in the `modify`"]
235 #[doc = " method."]
236 pub type R<REG> = raw::R<REG>;
237 impl<REG: RegisterSpec> R<REG> {
238 #[doc = " Reads raw bits from register."]
239 #[inline(always)]
240 pub const fn bits(&self) -> REG::Ux {
241 self.bits
242 }
243 }
244 impl<REG: RegisterSpec, FI> PartialEq<FI> for R<REG>
245 where
246 REG::Ux: PartialEq,
247 FI: Copy,
248 REG::Ux: From<FI>,
249 {
250 #[inline(always)]
251 fn eq(&self, other: &FI) -> bool {
252 self.bits.eq(®::Ux::from(*other))
253 }
254 }
255 #[doc = " Register writer."]
256 #[doc = ""]
257 #[doc = " Used as an argument to the closures in the `write` and `modify` methods of the register."]
258 pub type W<REG> = raw::W<REG>;
259 impl<REG: Writable> W<REG> {
260 #[doc = " Writes raw bits to the register."]
261 #[doc = ""]
262 #[doc = " # Safety"]
263 #[doc = ""]
264 #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"]
265 #[inline(always)]
266 pub unsafe fn bits(&mut self, bits: REG::Ux) -> &mut Self {
267 self.bits = bits;
268 self
269 }
270 }
271 impl<REG> W<REG>
272 where
273 REG: Writable<Safety = Safe>,
274 {
275 #[doc = " Writes raw bits to the register."]
276 #[inline(always)]
277 pub fn set(&mut self, bits: REG::Ux) -> &mut Self {
278 self.bits = bits;
279 self
280 }
281 }
282 #[doc = " Field reader."]
283 #[doc = ""]
284 #[doc = " Result of the `read` methods of fields."]
285 pub type FieldReader<FI = u8> = raw::FieldReader<FI>;
286 #[doc = " Bit-wise field reader"]
287 pub type BitReader<FI = bool> = raw::BitReader<FI>;
288 impl<FI: FieldSpec> FieldReader<FI> {
289 #[doc = " Reads raw bits from field."]
290 #[inline(always)]
291 pub const fn bits(&self) -> FI::Ux {
292 self.bits
293 }
294 }
295 impl<FI: FieldSpec> core::fmt::Debug for FieldReader<FI> {
296 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
297 core::fmt::Debug::fmt(&self.bits, f)
298 }
299 }
300 impl<FI> PartialEq<FI> for FieldReader<FI>
301 where
302 FI: FieldSpec + Copy,
303 {
304 #[inline(always)]
305 fn eq(&self, other: &FI) -> bool {
306 self.bits.eq(&FI::Ux::from(*other))
307 }
308 }
309 impl<FI> PartialEq<FI> for BitReader<FI>
310 where
311 FI: Copy,
312 bool: From<FI>,
313 {
314 #[inline(always)]
315 fn eq(&self, other: &FI) -> bool {
316 self.bits.eq(&bool::from(*other))
317 }
318 }
319 impl<FI> BitReader<FI> {
320 #[doc = " Value of the field as raw bits."]
321 #[inline(always)]
322 pub const fn bit(&self) -> bool {
323 self.bits
324 }
325 #[doc = " Returns `true` if the bit is clear (0)."]
326 #[inline(always)]
327 pub const fn bit_is_clear(&self) -> bool {
328 !self.bit()
329 }
330 #[doc = " Returns `true` if the bit is set (1)."]
331 #[inline(always)]
332 pub const fn bit_is_set(&self) -> bool {
333 self.bit()
334 }
335 }
336 impl<FI> core::fmt::Debug for BitReader<FI> {
337 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
338 core::fmt::Debug::fmt(&self.bits, f)
339 }
340 }
341 #[doc = " Marker for register/field writers which can take any value of specified width"]
342 pub struct Safe;
343 #[doc = " You should check that value is allowed to pass to register/field writer marked with this"]
344 pub struct Unsafe;
345 #[doc = " Marker for field writers are safe to write in specified inclusive range"]
346 pub struct Range<const MIN: u64, const MAX: u64>;
347 #[doc = " Marker for field writers are safe to write in specified inclusive range"]
348 pub struct RangeFrom<const MIN: u64>;
349 #[doc = " Marker for field writers are safe to write in specified inclusive range"]
350 pub struct RangeTo<const MAX: u64>;
351 #[doc = " Write field Proxy"]
352 pub type FieldWriter<'a, REG, const WI: u8, FI = u8, Safety = Unsafe> =
353 raw::FieldWriter<'a, REG, WI, FI, Safety>;
354 impl<REG, const WI: u8, FI, Safety> FieldWriter<'_, REG, WI, FI, Safety>
355 where
356 REG: Writable + RegisterSpec,
357 FI: FieldSpec,
358 {
359 #[doc = " Field width"]
360 pub const WIDTH: u8 = WI;
361 #[doc = " Field width"]
362 #[inline(always)]
363 pub const fn width(&self) -> u8 {
364 WI
365 }
366 #[doc = " Field offset"]
367 #[inline(always)]
368 pub const fn offset(&self) -> u8 {
369 self.o
370 }
371 }
372 impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety>
373 where
374 REG: Writable + RegisterSpec,
375 FI: FieldSpec,
376 REG::Ux: From<FI::Ux>,
377 {
378 #[doc = " Writes raw bits to the field"]
379 #[doc = ""]
380 #[doc = " # Safety"]
381 #[doc = ""]
382 #[doc = " Passing incorrect value can cause undefined behaviour. See reference manual"]
383 #[inline(always)]
384 pub unsafe fn bits(self, value: FI::Ux) -> &'a mut W<REG> {
385 self.w.bits &= !(REG::Ux::mask::<WI>() << self.o);
386 self.w.bits |= (REG::Ux::from(value) & REG::Ux::mask::<WI>()) << self.o;
387 self.w
388 }
389 }
390 impl<'a, REG, const WI: u8, FI> FieldWriter<'a, REG, WI, FI, Safe>
391 where
392 REG: Writable + RegisterSpec,
393 FI: FieldSpec,
394 REG::Ux: From<FI::Ux>,
395 {
396 #[doc = " Writes raw bits to the field"]
397 #[inline(always)]
398 pub fn set(self, value: FI::Ux) -> &'a mut W<REG> {
399 unsafe { self.bits(value) }
400 }
401 }
402 impl<'a, REG, const WI: u8, FI, const MIN: u64, const MAX: u64>
403 FieldWriter<'a, REG, WI, FI, Range<MIN, MAX>>
404 where
405 REG: Writable + RegisterSpec,
406 FI: FieldSpec,
407 REG::Ux: From<FI::Ux>,
408 u64: From<FI::Ux>,
409 {
410 #[doc = " Writes raw bits to the field"]
411 #[inline(always)]
412 pub fn set(self, value: FI::Ux) -> &'a mut W<REG> {
413 {
414 let value = u64::from(value);
415 assert!(value >= MIN && value <= MAX);
416 }
417 unsafe { self.bits(value) }
418 }
419 }
420 impl<'a, REG, const WI: u8, FI, const MIN: u64> FieldWriter<'a, REG, WI, FI, RangeFrom<MIN>>
421 where
422 REG: Writable + RegisterSpec,
423 FI: FieldSpec,
424 REG::Ux: From<FI::Ux>,
425 u64: From<FI::Ux>,
426 {
427 #[doc = " Writes raw bits to the field"]
428 #[inline(always)]
429 pub fn set(self, value: FI::Ux) -> &'a mut W<REG> {
430 {
431 let value = u64::from(value);
432 assert!(value >= MIN);
433 }
434 unsafe { self.bits(value) }
435 }
436 }
437 impl<'a, REG, const WI: u8, FI, const MAX: u64> FieldWriter<'a, REG, WI, FI, RangeTo<MAX>>
438 where
439 REG: Writable + RegisterSpec,
440 FI: FieldSpec,
441 REG::Ux: From<FI::Ux>,
442 u64: From<FI::Ux>,
443 {
444 #[doc = " Writes raw bits to the field"]
445 #[inline(always)]
446 pub fn set(self, value: FI::Ux) -> &'a mut W<REG> {
447 {
448 let value = u64::from(value);
449 assert!(value <= MAX);
450 }
451 unsafe { self.bits(value) }
452 }
453 }
454 impl<'a, REG, const WI: u8, FI, Safety> FieldWriter<'a, REG, WI, FI, Safety>
455 where
456 REG: Writable + RegisterSpec,
457 FI: IsEnum,
458 REG::Ux: From<FI::Ux>,
459 {
460 #[doc = " Writes `variant` to the field"]
461 #[inline(always)]
462 pub fn variant(self, variant: FI) -> &'a mut W<REG> {
463 unsafe { self.bits(FI::Ux::from(variant)) }
464 }
465 }
466 macro_rules! bit_proxy {
467 ($ writer : ident , $ mwv : ident) => {
468 #[doc(hidden)]
469 pub struct $mwv;
470 #[doc = " Bit-wise write field proxy"]
471 pub type $writer<'a, REG, FI = bool> = raw::BitWriter<'a, REG, FI, $mwv>;
472 impl<'a, REG, FI> $writer<'a, REG, FI>
473 where
474 REG: Writable + RegisterSpec,
475 bool: From<FI>,
476 {
477 #[doc = " Field width"]
478 pub const WIDTH: u8 = 1;
479 #[doc = " Field width"]
480 #[inline(always)]
481 pub const fn width(&self) -> u8 {
482 Self::WIDTH
483 }
484 #[doc = " Field offset"]
485 #[inline(always)]
486 pub const fn offset(&self) -> u8 {
487 self.o
488 }
489 #[doc = " Writes bit to the field"]
490 #[inline(always)]
491 pub fn bit(self, value: bool) -> &'a mut W<REG> {
492 self.w.bits &= !(REG::Ux::ONE << self.o);
493 self.w.bits |= (REG::Ux::from(value) & REG::Ux::ONE) << self.o;
494 self.w
495 }
496 #[doc = " Writes `variant` to the field"]
497 #[inline(always)]
498 pub fn variant(self, variant: FI) -> &'a mut W<REG> {
499 self.bit(bool::from(variant))
500 }
501 }
502 };
503 }
504 bit_proxy!(BitWriter, BitM);
505 bit_proxy!(BitWriter1S, Bit1S);
506 bit_proxy!(BitWriter0C, Bit0C);
507 bit_proxy!(BitWriter1C, Bit1C);
508 bit_proxy!(BitWriter0S, Bit0S);
509 bit_proxy!(BitWriter1T, Bit1T);
510 bit_proxy!(BitWriter0T, Bit0T);
511 impl<'a, REG, FI> BitWriter<'a, REG, FI>
512 where
513 REG: Writable + RegisterSpec,
514 bool: From<FI>,
515 {
516 #[doc = " Sets the field bit"]
517 #[inline(always)]
518 pub fn set_bit(self) -> &'a mut W<REG> {
519 self.w.bits |= REG::Ux::ONE << self.o;
520 self.w
521 }
522 #[doc = " Clears the field bit"]
523 #[inline(always)]
524 pub fn clear_bit(self) -> &'a mut W<REG> {
525 self.w.bits &= !(REG::Ux::ONE << self.o);
526 self.w
527 }
528 }
529 impl<'a, REG, FI> BitWriter1S<'a, REG, FI>
530 where
531 REG: Writable + RegisterSpec,
532 bool: From<FI>,
533 {
534 #[doc = " Sets the field bit"]
535 #[inline(always)]
536 pub fn set_bit(self) -> &'a mut W<REG> {
537 self.w.bits |= REG::Ux::ONE << self.o;
538 self.w
539 }
540 }
541 impl<'a, REG, FI> BitWriter0C<'a, REG, FI>
542 where
543 REG: Writable + RegisterSpec,
544 bool: From<FI>,
545 {
546 #[doc = " Clears the field bit"]
547 #[inline(always)]
548 pub fn clear_bit(self) -> &'a mut W<REG> {
549 self.w.bits &= !(REG::Ux::ONE << self.o);
550 self.w
551 }
552 }
553 impl<'a, REG, FI> BitWriter1C<'a, REG, FI>
554 where
555 REG: Writable + RegisterSpec,
556 bool: From<FI>,
557 {
558 #[doc = "Clears the field bit by passing one"]
559 #[inline(always)]
560 pub fn clear_bit_by_one(self) -> &'a mut W<REG> {
561 self.w.bits |= REG::Ux::ONE << self.o;
562 self.w
563 }
564 }
565 impl<'a, REG, FI> BitWriter0S<'a, REG, FI>
566 where
567 REG: Writable + RegisterSpec,
568 bool: From<FI>,
569 {
570 #[doc = "Sets the field bit by passing zero"]
571 #[inline(always)]
572 pub fn set_bit_by_zero(self) -> &'a mut W<REG> {
573 self.w.bits &= !(REG::Ux::ONE << self.o);
574 self.w
575 }
576 }
577 impl<'a, REG, FI> BitWriter1T<'a, REG, FI>
578 where
579 REG: Writable + RegisterSpec,
580 bool: From<FI>,
581 {
582 #[doc = "Toggle the field bit by passing one"]
583 #[inline(always)]
584 pub fn toggle_bit(self) -> &'a mut W<REG> {
585 self.w.bits |= REG::Ux::ONE << self.o;
586 self.w
587 }
588 }
589 impl<'a, REG, FI> BitWriter0T<'a, REG, FI>
590 where
591 REG: Writable + RegisterSpec,
592 bool: From<FI>,
593 {
594 #[doc = "Toggle the field bit by passing zero"]
595 #[inline(always)]
596 pub fn toggle_bit(self) -> &'a mut W<REG> {
597 self.w.bits &= !(REG::Ux::ONE << self.o);
598 self.w
599 }
600 }
601 #[doc = " This structure provides volatile access to registers."]
602 #[repr(transparent)]
603 pub struct Reg<REG: RegisterSpec> {
604 register: vcell::VolatileCell<REG::Ux>,
605 _marker: marker::PhantomData<REG>,
606 }
607 unsafe impl<REG: RegisterSpec> Send for Reg<REG> where REG::Ux: Send {}
608 impl<REG: RegisterSpec> Reg<REG> {
609 #[doc = " Returns the underlying memory address of register."]
610 #[doc = ""]
611 #[doc = " ```ignore"]
612 #[doc = " let reg_ptr = periph.reg.as_ptr();"]
613 #[doc = " ```"]
614 #[inline(always)]
615 pub fn as_ptr(&self) -> *mut REG::Ux {
616 self.register.as_ptr()
617 }
618 }
619 impl<REG: Readable> Reg<REG> {
620 #[doc = " Reads the contents of a `Readable` register."]
621 #[doc = ""]
622 #[doc = " You can read the raw contents of a register by using `bits`:"]
623 #[doc = " ```ignore"]
624 #[doc = " let bits = periph.reg.read().bits();"]
625 #[doc = " ```"]
626 #[doc = " or get the content of a particular field of a register:"]
627 #[doc = " ```ignore"]
628 #[doc = " let reader = periph.reg.read();"]
629 #[doc = " let bits = reader.field1().bits();"]
630 #[doc = " let flag = reader.field2().bit_is_set();"]
631 #[doc = " ```"]
632 #[inline(always)]
633 pub fn read(&self) -> R<REG> {
634 R {
635 bits: self.register.get(),
636 _reg: marker::PhantomData,
637 }
638 }
639 }
640 impl<REG: Resettable + Writable> Reg<REG> {
641 #[doc = " Writes the reset value to `Writable` register."]
642 #[doc = ""]
643 #[doc = " Resets the register to its initial state."]
644 #[inline(always)]
645 pub fn reset(&self) {
646 self.register.set(REG::RESET_VALUE)
647 }
648 #[doc = " Writes bits to a `Writable` register."]
649 #[doc = ""]
650 #[doc = " You can write raw bits into a register:"]
651 #[doc = " ```ignore"]
652 #[doc = " periph.reg.write(|w| unsafe { w.bits(rawbits) });"]
653 #[doc = " ```"]
654 #[doc = " or write only the fields you need:"]
655 #[doc = " ```ignore"]
656 #[doc = " periph.reg.write(|w| w"]
657 #[doc = " .field1().bits(newfield1bits)"]
658 #[doc = " .field2().set_bit()"]
659 #[doc = " .field3().variant(VARIANT)"]
660 #[doc = " );"]
661 #[doc = " ```"]
662 #[doc = " or an alternative way of saying the same:"]
663 #[doc = " ```ignore"]
664 #[doc = " periph.reg.write(|w| {"]
665 #[doc = " w.field1().bits(newfield1bits);"]
666 #[doc = " w.field2().set_bit();"]
667 #[doc = " w.field3().variant(VARIANT)"]
668 #[doc = " });"]
669 #[doc = " ```"]
670 #[doc = " In the latter case, other fields will be set to their reset value."]
671 #[inline(always)]
672 pub fn write<F>(&self, f: F) -> REG::Ux
673 where
674 F: FnOnce(&mut W<REG>) -> &mut W<REG>,
675 {
676 let value = f(&mut W {
677 bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
678 | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
679 _reg: marker::PhantomData,
680 })
681 .bits;
682 self.register.set(value);
683 value
684 }
685 #[doc = " Writes bits to a `Writable` register and produce a value."]
686 #[doc = ""]
687 #[doc = " You can write raw bits into a register:"]
688 #[doc = " ```ignore"]
689 #[doc = " periph.reg.write_and(|w| unsafe { w.bits(rawbits); });"]
690 #[doc = " ```"]
691 #[doc = " or write only the fields you need:"]
692 #[doc = " ```ignore"]
693 #[doc = " periph.reg.write_and(|w| {"]
694 #[doc = " w.field1().bits(newfield1bits)"]
695 #[doc = " .field2().set_bit()"]
696 #[doc = " .field3().variant(VARIANT);"]
697 #[doc = " });"]
698 #[doc = " ```"]
699 #[doc = " or an alternative way of saying the same:"]
700 #[doc = " ```ignore"]
701 #[doc = " periph.reg.write_and(|w| {"]
702 #[doc = " w.field1().bits(newfield1bits);"]
703 #[doc = " w.field2().set_bit();"]
704 #[doc = " w.field3().variant(VARIANT);"]
705 #[doc = " });"]
706 #[doc = " ```"]
707 #[doc = " In the latter case, other fields will be set to their reset value."]
708 #[doc = ""]
709 #[doc = " Values can be returned from the closure:"]
710 #[doc = " ```ignore"]
711 #[doc = " let state = periph.reg.write_and(|w| State::set(w.field1()));"]
712 #[doc = " ```"]
713 #[inline(always)]
714 pub fn from_write<F, T>(&self, f: F) -> T
715 where
716 F: FnOnce(&mut W<REG>) -> T,
717 {
718 let mut writer = W {
719 bits: REG::RESET_VALUE & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
720 | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
721 _reg: marker::PhantomData,
722 };
723 let result = f(&mut writer);
724 self.register.set(writer.bits);
725 result
726 }
727 }
728 impl<REG: Writable> Reg<REG> {
729 #[doc = " Writes 0 to a `Writable` register."]
730 #[doc = ""]
731 #[doc = " Similar to `write`, but unused bits will contain 0."]
732 #[doc = ""]
733 #[doc = " # Safety"]
734 #[doc = ""]
735 #[doc = " Unsafe to use with registers which don't allow to write 0."]
736 #[inline(always)]
737 pub unsafe fn write_with_zero<F>(&self, f: F) -> REG::Ux
738 where
739 F: FnOnce(&mut W<REG>) -> &mut W<REG>,
740 {
741 let value = f(&mut W {
742 bits: REG::Ux::ZERO,
743 _reg: marker::PhantomData,
744 })
745 .bits;
746 self.register.set(value);
747 value
748 }
749 #[doc = " Writes 0 to a `Writable` register and produces a value."]
750 #[doc = ""]
751 #[doc = " Similar to `write`, but unused bits will contain 0."]
752 #[doc = ""]
753 #[doc = " # Safety"]
754 #[doc = ""]
755 #[doc = " Unsafe to use with registers which don't allow to write 0."]
756 #[inline(always)]
757 pub unsafe fn from_write_with_zero<F, T>(&self, f: F) -> T
758 where
759 F: FnOnce(&mut W<REG>) -> T,
760 {
761 let mut writer = W {
762 bits: REG::Ux::ZERO,
763 _reg: marker::PhantomData,
764 };
765 let result = f(&mut writer);
766 self.register.set(writer.bits);
767 result
768 }
769 }
770 impl<REG: Readable + Writable> Reg<REG> {
771 #[doc = " Modifies the contents of the register by reading and then writing it."]
772 #[doc = ""]
773 #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
774 #[doc = " ```ignore"]
775 #[doc = " periph.reg.modify(|r, w| unsafe { w.bits("]
776 #[doc = " r.bits() | 3"]
777 #[doc = " ) });"]
778 #[doc = " ```"]
779 #[doc = " or"]
780 #[doc = " ```ignore"]
781 #[doc = " periph.reg.modify(|_, w| w"]
782 #[doc = " .field1().bits(newfield1bits)"]
783 #[doc = " .field2().set_bit()"]
784 #[doc = " .field3().variant(VARIANT)"]
785 #[doc = " );"]
786 #[doc = " ```"]
787 #[doc = " or an alternative way of saying the same:"]
788 #[doc = " ```ignore"]
789 #[doc = " periph.reg.modify(|_, w| {"]
790 #[doc = " w.field1().bits(newfield1bits);"]
791 #[doc = " w.field2().set_bit();"]
792 #[doc = " w.field3().variant(VARIANT)"]
793 #[doc = " });"]
794 #[doc = " ```"]
795 #[doc = " Other fields will have the value they had before the call to `modify`."]
796 #[inline(always)]
797 pub fn modify<F>(&self, f: F) -> REG::Ux
798 where
799 for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> &'w mut W<REG>,
800 {
801 let bits = self.register.get();
802 let value = f(
803 &R {
804 bits,
805 _reg: marker::PhantomData,
806 },
807 &mut W {
808 bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP
809 | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
810 _reg: marker::PhantomData,
811 },
812 )
813 .bits;
814 self.register.set(value);
815 value
816 }
817 #[doc = " Modifies the contents of the register by reading and then writing it"]
818 #[doc = " and produces a value."]
819 #[doc = ""]
820 #[doc = " E.g. to do a read-modify-write sequence to change parts of a register:"]
821 #[doc = " ```ignore"]
822 #[doc = " let bits = periph.reg.modify(|r, w| {"]
823 #[doc = " let new_bits = r.bits() | 3;"]
824 #[doc = " unsafe {"]
825 #[doc = " w.bits(new_bits);"]
826 #[doc = " }"]
827 #[doc = ""]
828 #[doc = " new_bits"]
829 #[doc = " });"]
830 #[doc = " ```"]
831 #[doc = " or"]
832 #[doc = " ```ignore"]
833 #[doc = " periph.reg.modify(|_, w| {"]
834 #[doc = " w.field1().bits(newfield1bits)"]
835 #[doc = " .field2().set_bit()"]
836 #[doc = " .field3().variant(VARIANT);"]
837 #[doc = " });"]
838 #[doc = " ```"]
839 #[doc = " or an alternative way of saying the same:"]
840 #[doc = " ```ignore"]
841 #[doc = " periph.reg.modify(|_, w| {"]
842 #[doc = " w.field1().bits(newfield1bits);"]
843 #[doc = " w.field2().set_bit();"]
844 #[doc = " w.field3().variant(VARIANT);"]
845 #[doc = " });"]
846 #[doc = " ```"]
847 #[doc = " Other fields will have the value they had before the call to `modify`."]
848 #[inline(always)]
849 pub fn from_modify<F, T>(&self, f: F) -> T
850 where
851 for<'w> F: FnOnce(&R<REG>, &'w mut W<REG>) -> T,
852 {
853 let bits = self.register.get();
854 let mut writer = W {
855 bits: bits & !REG::ONE_TO_MODIFY_FIELDS_BITMAP | REG::ZERO_TO_MODIFY_FIELDS_BITMAP,
856 _reg: marker::PhantomData,
857 };
858 let result = f(
859 &R {
860 bits,
861 _reg: marker::PhantomData,
862 },
863 &mut writer,
864 );
865 self.register.set(writer.bits);
866 result
867 }
868 }
869 impl<REG: Readable> core::fmt::Debug for crate::generic::Reg<REG>
870 where
871 R<REG>: core::fmt::Debug,
872 {
873 fn fmt(&self, f: &mut core::fmt::Formatter<'_>) -> core::fmt::Result {
874 core::fmt::Debug::fmt(&self.read(), f)
875 }
876 }
877}
878#[cfg(feature = "rt")]
879extern "C" {}
880#[doc(hidden)]
881#[repr(C)]
882pub union Vector {
883 _handler: unsafe extern "C" fn(),
884 _reserved: u32,
885}
886#[cfg(feature = "rt")]
887#[doc(hidden)]
888#[link_section = ".vector_table.interrupts"]
889#[no_mangle]
890pub static __INTERRUPTS: [Vector; 0] = [];
891#[doc = r"Enumeration of all the interrupts."]
892#[derive(Copy, Clone, Debug, PartialEq, Eq)]
893pub enum Interrupt {}
894unsafe impl cortex_m::interrupt::InterruptNumber for Interrupt {
895 #[inline(always)]
896 fn number(self) -> u16 {
897 match self {}
898 }
899}
900#[doc = "A fake UART"]
901pub type Uart = crate::Periph<uart::RegisterBlock, 0x4001_0000>;
902impl core::fmt::Debug for Uart {
903 fn fmt(&self, f: &mut core::fmt::Formatter) -> core::fmt::Result {
904 f.debug_struct("Uart").finish()
905 }
906}
907#[doc = "A fake UART"]
908pub mod uart {
909 #[repr(C)]
910 #[doc = "Register block"]
911 pub struct RegisterBlock {
912 data: Data,
913 control: Control,
914 status: Status,
915 }
916 impl RegisterBlock {
917 #[doc = "0x00 - The TX/RX FIFO"]
918 #[inline(always)]
919 pub const fn data(&self) -> &Data {
920 &self.data
921 }
922 #[doc = "0x04 - Control Register"]
923 #[inline(always)]
924 pub const fn control(&self) -> &Control {
925 &self.control
926 }
927 #[doc = "0x08 - Status Register"]
928 #[inline(always)]
929 pub const fn status(&self) -> &Status {
930 &self.status
931 }
932 }
933 #[doc = "DATA (rw) register accessor: The TX/RX FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@data`] module"]
934 #[doc(alias = "DATA")]
935 pub type Data = crate::Reg<data::DataSpec>;
936 #[doc = "The TX/RX FIFO"]
937 pub mod data {
938 #[doc = "Register `DATA` reader"]
939 pub type R = crate::R<DataSpec>;
940 #[doc = "Register `DATA` writer"]
941 pub type W = crate::W<DataSpec>;
942 #[doc = "Field `BYTE` reader - "]
943 pub type ByteR = crate::FieldReader;
944 #[doc = "Field `BYTE` writer - "]
945 pub type ByteW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
946 impl R {
947 #[doc = "Bits 0:7"]
948 #[inline(always)]
949 pub fn byte(&self) -> ByteR {
950 ByteR::new((self.bits & 0xff) as u8)
951 }
952 }
953 impl W {
954 #[doc = "Bits 0:7"]
955 #[inline(always)]
956 pub fn byte(&mut self) -> ByteW<'_, DataSpec> {
957 ByteW::new(self, 0)
958 }
959 }
960 #[doc = "The TX/RX FIFO\n\nYou can [`read`](crate::Reg::read) this register and get [`data::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`data::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
961 pub struct DataSpec;
962 impl crate::RegisterSpec for DataSpec {
963 type Ux = u32;
964 }
965 #[doc = "`read()` method returns [`data::R`](R) reader structure"]
966 impl crate::Readable for DataSpec {}
967 #[doc = "`write(|w| ..)` method takes [`data::W`](W) writer structure"]
968 impl crate::Writable for DataSpec {
969 type Safety = crate::Unsafe;
970 }
971 #[doc = "`reset()` method sets DATA to value 0"]
972 impl crate::Resettable for DataSpec {}
973 }
974 #[doc = "CONTROL (rw) register accessor: Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`control::R`]. You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`control::W`]. You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@control`] module"]
975 #[doc(alias = "CONTROL")]
976 pub type Control = crate::Reg<control::ControlSpec>;
977 #[doc = "Control Register"]
978 pub mod control {
979 #[doc = "Register `CONTROL` reader"]
980 pub type R = crate::R<ControlSpec>;
981 #[doc = "Register `CONTROL` writer"]
982 pub type W = crate::W<ControlSpec>;
983 #[doc = "Is this peripheral enabled?\n\nValue on reset: 0"]
984 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
985 pub enum En {
986 #[doc = "0: Peripheral is disabled"]
987 Disabled = 0,
988 #[doc = "1: Peripheral is enabled"]
989 Enabled = 1,
990 }
991 impl From<En> for bool {
992 #[inline(always)]
993 fn from(variant: En) -> Self {
994 variant as u8 != 0
995 }
996 }
997 #[doc = "Field `EN` reader - Is this peripheral enabled?"]
998 pub type EnR = crate::BitReader<En>;
999 impl EnR {
1000 #[doc = "Get enumerated values variant"]
1001 #[inline(always)]
1002 pub const fn variant(&self) -> En {
1003 match self.bits {
1004 false => En::Disabled,
1005 true => En::Enabled,
1006 }
1007 }
1008 #[doc = "Peripheral is disabled"]
1009 #[inline(always)]
1010 pub fn is_disabled(&self) -> bool {
1011 *self == En::Disabled
1012 }
1013 #[doc = "Peripheral is enabled"]
1014 #[inline(always)]
1015 pub fn is_enabled(&self) -> bool {
1016 *self == En::Enabled
1017 }
1018 }
1019 #[doc = "Field `EN` writer - Is this peripheral enabled?"]
1020 pub type EnW<'a, REG> = crate::BitWriter<'a, REG, En>;
1021 impl<'a, REG> EnW<'a, REG>
1022 where
1023 REG: crate::Writable + crate::RegisterSpec,
1024 {
1025 #[doc = "Peripheral is disabled"]
1026 #[inline(always)]
1027 pub fn disabled(self) -> &'a mut crate::W<REG> {
1028 self.variant(En::Disabled)
1029 }
1030 #[doc = "Peripheral is enabled"]
1031 #[inline(always)]
1032 pub fn enabled(self) -> &'a mut crate::W<REG> {
1033 self.variant(En::Enabled)
1034 }
1035 }
1036 #[doc = "Field `BAUD_RATE` reader - Baud Rate"]
1037 pub type BaudRateR = crate::FieldReader<u32>;
1038 #[doc = "Field `BAUD_RATE` writer - Baud Rate"]
1039 pub type BaudRateW<'a, REG> = crate::FieldWriter<'a, REG, 23, u32>;
1040 #[doc = "Parity bits for a byte\n\nValue on reset: 0"]
1041 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
1042 #[repr(u8)]
1043 pub enum Parity {
1044 #[doc = "0: No parity bits"]
1045 None = 0,
1046 #[doc = "1: Even parity"]
1047 Even = 1,
1048 #[doc = "3: Odd parity"]
1049 Odd = 3,
1050 }
1051 impl From<Parity> for u8 {
1052 #[inline(always)]
1053 fn from(variant: Parity) -> Self {
1054 variant as _
1055 }
1056 }
1057 impl crate::FieldSpec for Parity {
1058 type Ux = u8;
1059 }
1060 impl crate::IsEnum for Parity {}
1061 #[doc = "Field `PARITY` reader - Parity bits for a byte"]
1062 pub type ParityR = crate::FieldReader<Parity>;
1063 impl ParityR {
1064 #[doc = "Get enumerated values variant"]
1065 #[inline(always)]
1066 pub const fn variant(&self) -> Option<Parity> {
1067 match self.bits {
1068 0 => Some(Parity::None),
1069 1 => Some(Parity::Even),
1070 3 => Some(Parity::Odd),
1071 _ => None,
1072 }
1073 }
1074 #[doc = "No parity bits"]
1075 #[inline(always)]
1076 pub fn is_none(&self) -> bool {
1077 *self == Parity::None
1078 }
1079 #[doc = "Even parity"]
1080 #[inline(always)]
1081 pub fn is_even(&self) -> bool {
1082 *self == Parity::Even
1083 }
1084 #[doc = "Odd parity"]
1085 #[inline(always)]
1086 pub fn is_odd(&self) -> bool {
1087 *self == Parity::Odd
1088 }
1089 }
1090 #[doc = "Field `PARITY` writer - Parity bits for a byte"]
1091 pub type ParityW<'a, REG> = crate::FieldWriter<'a, REG, 2, Parity>;
1092 impl<'a, REG> ParityW<'a, REG>
1093 where
1094 REG: crate::Writable + crate::RegisterSpec,
1095 REG::Ux: From<u8>,
1096 {
1097 #[doc = "No parity bits"]
1098 #[inline(always)]
1099 pub fn none(self) -> &'a mut crate::W<REG> {
1100 self.variant(Parity::None)
1101 }
1102 #[doc = "Even parity"]
1103 #[inline(always)]
1104 pub fn even(self) -> &'a mut crate::W<REG> {
1105 self.variant(Parity::Even)
1106 }
1107 #[doc = "Odd parity"]
1108 #[inline(always)]
1109 pub fn odd(self) -> &'a mut crate::W<REG> {
1110 self.variant(Parity::Odd)
1111 }
1112 }
1113 impl R {
1114 #[doc = "Bit 0 - Is this peripheral enabled?"]
1115 #[inline(always)]
1116 pub fn en(&self) -> EnR {
1117 EnR::new((self.bits & 1) != 0)
1118 }
1119 #[doc = "Bits 1:23 - Baud Rate"]
1120 #[inline(always)]
1121 pub fn baud_rate(&self) -> BaudRateR {
1122 BaudRateR::new((self.bits >> 1) & 0x007f_ffff)
1123 }
1124 #[doc = "Bits 24:25 - Parity bits for a byte"]
1125 #[inline(always)]
1126 pub fn parity(&self) -> ParityR {
1127 ParityR::new(((self.bits >> 24) & 3) as u8)
1128 }
1129 }
1130 impl W {
1131 #[doc = "Bit 0 - Is this peripheral enabled?"]
1132 #[inline(always)]
1133 pub fn en(&mut self) -> EnW<'_, ControlSpec> {
1134 EnW::new(self, 0)
1135 }
1136 #[doc = "Bits 1:23 - Baud Rate"]
1137 #[inline(always)]
1138 pub fn baud_rate(&mut self) -> BaudRateW<'_, ControlSpec> {
1139 BaudRateW::new(self, 1)
1140 }
1141 #[doc = "Bits 24:25 - Parity bits for a byte"]
1142 #[inline(always)]
1143 pub fn parity(&mut self) -> ParityW<'_, ControlSpec> {
1144 ParityW::new(self, 24)
1145 }
1146 }
1147 #[doc = "Control Register\n\nYou can [`read`](crate::Reg::read) this register and get [`control::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`control::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1148 pub struct ControlSpec;
1149 impl crate::RegisterSpec for ControlSpec {
1150 type Ux = u32;
1151 }
1152 #[doc = "`read()` method returns [`control::R`](R) reader structure"]
1153 impl crate::Readable for ControlSpec {}
1154 #[doc = "`write(|w| ..)` method takes [`control::W`](W) writer structure"]
1155 impl crate::Writable for ControlSpec {
1156 type Safety = crate::Unsafe;
1157 }
1158 #[doc = "`reset()` method sets CONTROL to value 0"]
1159 impl crate::Resettable for ControlSpec {}
1160 }
1161 #[doc = "STATUS (r) register accessor: Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`]. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@status`] module"]
1162 #[doc(alias = "STATUS")]
1163 pub type Status = crate::Reg<status::StatusSpec>;
1164 #[doc = "Status Register"]
1165 pub mod status {
1166 #[doc = "Register `STATUS` reader"]
1167 pub type R = crate::R<StatusSpec>;
1168 #[doc = "Does the TX FIFO have data?\n\nValue on reset: 0"]
1169 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
1170 #[repr(u8)]
1171 pub enum TxReady {
1172 #[doc = "1: `1`"]
1173 Yes = 1,
1174 #[doc = "0: `0`"]
1175 No = 0,
1176 }
1177 impl From<TxReady> for u8 {
1178 #[inline(always)]
1179 fn from(variant: TxReady) -> Self {
1180 variant as _
1181 }
1182 }
1183 impl crate::FieldSpec for TxReady {
1184 type Ux = u8;
1185 }
1186 impl crate::IsEnum for TxReady {}
1187 #[doc = "Field `TX_READY` reader - Does the TX FIFO have data?"]
1188 pub type TxReadyR = crate::FieldReader<TxReady>;
1189 impl TxReadyR {
1190 #[doc = "Get enumerated values variant"]
1191 #[inline(always)]
1192 pub const fn variant(&self) -> Option<TxReady> {
1193 match self.bits {
1194 1 => Some(TxReady::Yes),
1195 0 => Some(TxReady::No),
1196 _ => None,
1197 }
1198 }
1199 #[doc = "`1`"]
1200 #[inline(always)]
1201 pub fn is_yes(&self) -> bool {
1202 *self == TxReady::Yes
1203 }
1204 #[doc = "`0`"]
1205 #[inline(always)]
1206 pub fn is_no(&self) -> bool {
1207 *self == TxReady::No
1208 }
1209 }
1210 #[doc = "Does the RX FIFO have data?\n\nValue on reset: 0"]
1211 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
1212 #[repr(u8)]
1213 pub enum RxReady {
1214 #[doc = "1: `1`"]
1215 Yes = 1,
1216 #[doc = "0: `0`"]
1217 No = 0,
1218 }
1219 impl From<RxReady> for u8 {
1220 #[inline(always)]
1221 fn from(variant: RxReady) -> Self {
1222 variant as _
1223 }
1224 }
1225 impl crate::FieldSpec for RxReady {
1226 type Ux = u8;
1227 }
1228 impl crate::IsEnum for RxReady {}
1229 #[doc = "Field `RX_READY` reader - Does the RX FIFO have data?"]
1230 pub type RxReadyR = crate::FieldReader<RxReady>;
1231 impl RxReadyR {
1232 #[doc = "Get enumerated values variant"]
1233 #[inline(always)]
1234 pub const fn variant(&self) -> Option<RxReady> {
1235 match self.bits {
1236 1 => Some(RxReady::Yes),
1237 0 => Some(RxReady::No),
1238 _ => None,
1239 }
1240 }
1241 #[doc = "`1`"]
1242 #[inline(always)]
1243 pub fn is_yes(&self) -> bool {
1244 *self == RxReady::Yes
1245 }
1246 #[doc = "`0`"]
1247 #[inline(always)]
1248 pub fn is_no(&self) -> bool {
1249 *self == RxReady::No
1250 }
1251 }
1252 impl R {
1253 #[doc = "Bits 0:1 - Does the TX FIFO have data?"]
1254 #[inline(always)]
1255 pub fn tx_ready(&self) -> TxReadyR {
1256 TxReadyR::new((self.bits & 3) as u8)
1257 }
1258 #[doc = "Bits 1:2 - Does the RX FIFO have data?"]
1259 #[inline(always)]
1260 pub fn rx_ready(&self) -> RxReadyR {
1261 RxReadyR::new(((self.bits >> 1) & 3) as u8)
1262 }
1263 }
1264 #[doc = "Status Register\n\nYou can [`read`](crate::Reg::read) this register and get [`status::R`](R). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
1265 pub struct StatusSpec;
1266 impl crate::RegisterSpec for StatusSpec {
1267 type Ux = u32;
1268 }
1269 #[doc = "`read()` method returns [`status::R`](R) reader structure"]
1270 impl crate::Readable for StatusSpec {}
1271 #[doc = "`reset()` method sets STATUS to value 0"]
1272 impl crate::Resettable for StatusSpec {}
1273 }
1274}
1275#[no_mangle]
1276static mut DEVICE_PERIPHERALS: bool = false;
1277#[doc = r" All the peripherals."]
1278#[allow(non_snake_case)]
1279pub struct Peripherals {
1280 #[doc = "Uart"]
1281 pub uart: Uart,
1282}
1283impl Peripherals {
1284 #[doc = r" Returns all the peripherals *once*."]
1285 #[cfg(feature = "critical-section")]
1286 #[inline]
1287 pub fn take() -> Option<Self> {
1288 critical_section::with(|_| {
1289 if unsafe { DEVICE_PERIPHERALS } {
1290 return None;
1291 }
1292 Some(unsafe { Peripherals::steal() })
1293 })
1294 }
1295 #[doc = r" Unchecked version of `Peripherals::take`."]
1296 #[doc = r""]
1297 #[doc = r" # Safety"]
1298 #[doc = r""]
1299 #[doc = r" Each of the returned peripherals must be used at most once."]
1300 #[inline]
1301 pub unsafe fn steal() -> Self {
1302 DEVICE_PERIPHERALS = true;
1303 Peripherals {
1304 uart: Uart::steal(),
1305 }
1306 }
1307}